HardwareFreaks

Tag: Vertical integration

  • Tesla hires 17-year Intel veteran responsible for billion-dollar fab startups — Gary Jiang likely chosen to oversee fab efforts for Terafab’s licensing of 14A

    Featured image Tesla hires 17year Intel veteran responsible for billiondollar fab startups Gary Jiang likely chosen to oversee fab efforts for Terafa

    The Silicon Shift: How an Intel Veteran is Driving Tesla’s Semiconductor Revolution

    In the relentless race toward artificial intelligence and deep space exploration, the battleground has shifted firmly into the realm of semiconductors. And at the epicenter of this transformation, Tesla is making a significant strategic move, not just in vehicle production, but in mastering the very foundations of high-volume chip manufacturing. This ambition is taking shape through a highly anticipated leadership appointment that signals Tesla’s commitment to building an experienced semiconductor organization from the ground up.

    The key to this drive lies with Gary Jiang, an executive who brings decades of experience from one of the world’s most demanding technology powerhouses. Jiang joined Tesla in June 2026, bringing with him a deep understanding of how complex manufacturing facilities are built, equipped, and brought to life. His pedigree is rooted firmly in Intel, where he spent over seventeen years navigating the complexities of advanced fabrication.

    During his tenure at Intel, Jiang was instrumental in some of the most critical transitions in semiconductor history. He oversaw the massive effort to transfer Intel’s leading-edge 18A technology process from their development fab in Oregon to high-volume manufacturing facilities in Arizona. This involved managing everything from factory construction and the installation of sophisticated equipment to ensuring product certification.

    Before joining Tesla, Jiang managed technician teams responsible for optimizing yield and output across cutting-edge nodes, including 22nm, 14nm, and 10nm-class processes at Intel’s Ocotillo campus. This experience is not merely academic; it is the practical knowledge of turning blueprints into functional, high-efficiency production lines.

    This deep manufacturing expertise aligns perfectly with Tesla‘s audacious vision for Terafab—the joint initiative between Tesla, SpaceX, and xAI aimed at vertical integration in chip design. While the overarching leadership of Terafab remains a complex endeavor requiring broad coordination, Jiang’s specific skills make him an invaluable asset. He possesses the precise knowledge needed to transform newly constructed cleanroom shells into production-ready semiconductor manufacturing facilities.

    The ultimate goal is not just building chips, but mastering the process itself. While Tesla and SpaceX are targeting full high-volume chip manufacturing through licensing agreements, the immediate focus involves establishing a robust development base. This vision is supported by Tesla‘s plan to construct a massive $3 billion semiconductor R&D center at its Texas campus, housing pilot lines designed to validate new technologies before commercial scaling.

    This move highlights how the cutting edge of technological progress relies not only on brilliant scientific theory but also on exceptional operational leadership. By hiring veterans like Gary Jiang, Tesla is weaving together industry experience with revolutionary ambition, setting a powerful precedent for how future technology will be built and scaled.

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    Credit: Tom’s Hardware

  • IBM unveils sub-1-nanometer chip architecture that stacks 100 billion transistors onto a fingernail-sized processor

    The Vertical Revolution: How IBM Is Stacking Chips to Defy Physics

    The relentless pursuit of smaller, faster microchips has always been the engine of the semiconductor industry. For decades, designers focused on shrinking components along a flat plane—a process known as traditional scaling. However, as engineers push toward the sub-1 nanometer level, they inevitably run headfirst into fundamental physical limits that make further miniaturization increasingly difficult and less efficient.

    To tackle this impasse, a major shift in architectural thinking is underway, spearheaded by industry giants like IBM. Instead of continuing to fight the boundaries of two-dimensional scaling, the focus is now pivoting toward three-dimensional innovation: stacking transistors vertically.

    This revolutionary approach flips the conventional roadmap. Rather than shrinking components horizontally on a single plane, the new paradigm involves building complexity by layering transistors atop one another. This vertical architecture offers a powerful solution to the escalating physical constraints faced by semiconductor designers.

    By moving beyond traditional scaling, companies are unlocking entirely new pathways for increasing computational density and efficiency. Stacking allows engineers to pack more functionality into a smaller physical footprint, bypassing the limitations imposed by traditional planar design.

    This isn’t just an incremental tweak; it represents a fundamental rethinking of how technology is built at the atomic level. The shift toward vertical integration promises not only denser computing but also a more viable path for future technological advancements in processing power and energy efficiency.

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    Credit: TechSpot