PCIe 6.0 SSDs arrive Marvell Phison SMI unveil new controller tech

The world of high-speed computing is perpetually chasing the next performance leap, and the path to PCIe 6.0 has been less a straight line and more a fascinating journey through technical complexity and integration challenges. While the specification itself was ratified in early 2022, transforming theoretical possibilities into commercial reality required navigating significant hurdles related to signal integrity and industry-wide interoperability.

The core innovation of PCIe 6.0 lies in its adoption of PAM4 signaling. Unlike previous generations that relied on simple NRZ signaling, PAM4 encodes two bits per symbol using four voltage levels. This clever encoding allows the system to maintain a physical signaling rate of 32 Gbaud while effectively doubling the transfer rate to an astonishing 64 GT/s. However, this gain came at a cost: implementing PAM4 necessitated highly sophisticated solutions, including advanced Digital Signal Processors (DSPs), complex equalization techniques, Forward Error Correction (FEC), and retimers—a complexity that delayed commercial deployment.

The true challenge extended beyond the electrical signaling. Every new generation demanded rigorous interoperability testing among CPUs, GPUs, network cards, switches, and storage devices from dozens of vendors. Establishing entirely new compliance procedures and synchronization programs proved to be a time-consuming process, adding years to the roadmap for full deployment.

Despite these formidable hurdles, PCIe 6.0 is finally stepping into commercial platforms. This progress has seen major players in adjacent industries, including AMD and Nvidia, fully supporting the new standard, fueling a rapid convergence that is now reshaping the storage landscape.

For storage solutions, the implications are staggering. PCIe 6.0 effectively doubles host interface bandwidth to around 30.25 GB/s for a x4 link without protocol overhead. Crucially, the system manages to deliver this throughput while incorporating FEC, which slightly increases latency but allows for massive throughput gains without pushing signaling frequencies to unsustainable levels.

The race to build the backbone of this new architecture is being led by merchant controller providers. Companies like Marvell, Phison, and Silicon Motion are developing enterprise-grade platforms designed for maximum efficiency and capacity. Marvell’s Bravera SC6 controller, for instance, offers a powerful foundation, supporting up to 16 NAND channels and advanced security features necessary for modern data centers.

Phison is pushing boundaries with its X3 SSD controller, which targets hyperscale deployments. It boasts exceptional efficiency, delivering up to 28 GB/s sequential performance alongside the ability to manage SSD capacities up to 2 Petabytes, signaling a design ready for the future of AI and cloud infrastructure.

Meanwhile, the drive manufacturers are rapidly catching up by bringing commercially available PCIe 6.0 SSDs to market. Micron introduced its 9650 controller, which utilizes in-house technology to deliver sequential reads up to 28 GB/s, positioning it perfectly for AI server deployments that demand high-speed peer-to-peer communication.

Samsung has followed suit with the PM1763 drive, officially entering mass production in July. This flagship model supports capacities up to 16 TB and features advanced capabilities like post-quantum cryptography (PQC) support, making it a robust solution for AI data centers seeking both speed and enhanced security.

As merchant controllers solidify their offerings and storage devices hit the market, the next phase is about realizing the full potential of PCIe 6.0: delivering superior bandwidth-per-watt performance that powers the demanding requirements of tomorrow’s AI infrastructure.